EDN

Statistical static timing analysis: A view from the future

Since DAC 2005, there has been extensive discussion about using Statistical Static Timing Analysis (SSTA) to verify current and future generations of designs manufactured at 90 nm or below. Given the ...
EDN

Magma offers statistical timing analysis methodology

SAN FRANCISCO — Magma Design Automation Inc. Tuesday (July 18) announced the availability of a statistical static timing analysis methodology based on the company's Quartz SSTA and tuned to ...
Semiconductor Engineering

ECO Should Not Stand For Extended Challenge Order

There’s an old saying that the first 90% of a task takes 90% of the schedule, and the remaining 10% takes the other 90% of the time. In chip development, design-signoff closure has become one such ...
Electronic Design

Optimize For Power Before RTL Synthesis To Ease Timing Closure

Power consumption is a primary design consideration for today's systems-on-a-chip (SoCs). Consequently, pervasive powerreduction techniques are now an established part of the design process from ...